T5743N-TG Atmel, T5743N-TG Datasheet - Page 7

T5743N-TG

Manufacturer Part Number
T5743N-TG
Description
Manufacturer
Atmel
Datasheet

Specifications of T5743N-TG

Operating Frequency (max)
450000kHz
Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / Rohs Status
Not Compliant
The T5743N is designed to operate with data coding
where the DC level of the data signal is 50%. This is valid
for Manchester and Bi-phase coding. If other modulation
schemes are used, the DC level should always remain
within the range of V
The sensitivity may be reduced by up to 2 dB in that
condition.
Each BR_Range is also defined by a minimum and a
maximum edge-to-edge time (t
defined in the electrical characteristics. They should not
be exceeded to maintain full sensitivity of the receiver.
Receiving Characteristics
The RF receiver T5743N can be operated with and with-
out a SAW front-end filter. In a typical automotive
application, a SAW filter is used to achieve better selec-
tivity. The selectivity with and without a SAW front-end
filter is illustrated in figure 8. This example relates to
ASK mode. FSK mode exhibits similar behavior. Note
that the mirror frequency is reduced by 40 dB. The plots
are printed relatively to the maximum sensitivity. If a
SAW filter is used, an insertion loss of about 4 dB must
be considered.
When designing the system in terms of receiving band-
width, the LO deviation must be considered as it also
determines the IF center frequency. The total LO devi-
ation is calculated to be the sum of the deviation of the
crystal and the XTO deviation of the T5743N. Low-cost
crystals are specified to be within 100 ppm. The XTO
deviation of the T5743N is an additional deviation due to
the XTO circuit. This deviation is specified to be
ation is 130 ppm in that case. Note that the receiving
bandwidth and the IF-filter bandwidth are equivalent in
ASK mode but not in FSK mode.
Rev. A3, 17-Dec-01
30 ppm. If a crystal of 100 ppm is used, the total devi-
16564
–100
–10
–20
–30
–40
–50
–60
–70
–80
–90
0
–6 –5 –4 –3 –2 –1 0
Figure 8. Receiving frequency response
DC_min
df ( MHz )
= 33% and V
ee_sig
1
with SAW
without SAW
2
). These limits are
3
DC_max
4
5
6
= 66%.
Polling Circuit and Control Logic
The receiver is designed to consume less than 1 mA while
being sensitive to signals from a corresponding trans-
mitter. This is achieved via the polling circuit. This circuit
enables the signal path periodically for a short time.
During this time the bit-check logic verifies the presence
of a valid transmitter signal. Only if a valid signal is
detected the receiver remains active and transfers the data
to the connected C. If there is no valid signal present the
receiver is in sleep mode most of the time resulting in low
current consumption. This condition is called polling
mode. A connected C is disabled during that time.
All relevant parameters of the polling logic can be config-
ured by the connected C. This flexibility enables the
user to meet the specifications in terms of current con-
sumption, system response time, data rate etc.
Regarding the number of connection wires to the mC, the
receiver is very flexible. It can be either operated by a
single bi-directional line to save ports to the connected mC
or it can be operated by up to five uni-directional ports.
Basic Clock Cycle of the Digital Circuitry
The complete timing of the digital circuitry and the
analog filtering is derived from one clock. According to
figure 9, this clock cycle T
oscillator (XTO) in combination with a divider. The divi-
sion factor is controlled by the logical state at Pin MODE.
According to chapter ‘RF Front End’, the frequency of the
crystal oscillator (f
(f
local oscillator (f
RFin
) which also defines the operating frequency of the
Figure 9. Generation of the basic clock cycle
:14/:10
Divider
XTO
T
f
LO
Clk
XTO
XTO
).
) is defined by the RF input signal
Clk
16
15
14
MODE
XTO
DVCC
is derived from the crystal
T5743N
L : USA(:10)
H: Europe(:14)
7 (34)

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