T5743N-TG Atmel, T5743N-TG Datasheet - Page 17

T5743N-TG

Manufacturer Part Number
T5743N-TG
Description
Manufacturer
Atmel
Datasheet

Specifications of T5743N-TG

Operating Frequency (max)
450000kHz
Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / Rohs Status
Not Compliant
Digital Noise Suppression
After a data transmission, digital noise appears on the data
output (see figure 28). To prevent that digital noise keeps
the connected C busy, it can be suppressed in two differ-
ent ways.
1.
If the bit Noise_Disable (table 10) in the OPMODE regis-
ter is set to 1 (default), the receiver changes to bit-check
mode at the end of a valid data stream. The digital noise
Rev. A3, 17-Dec-01
Data_out (DATA)
DATA_CLK
Data_out (DATA)
DATA_CLK
DATA_CLK
Dem_out
Data_out (DATA)
Automatic noise suppression (figure 29):
Bit–check
Bit–check
mode
mode
Bit check ok
Bit check ok
Preburst
Preburst
Receiving mode,
data clock control
logic active
Receiving mode,
data clock control
logic active
Figure 28. Output of digital noise at the end of the data stream
’1’
Receiving mode,
data clock control
logic active
Figure 30. Occurence of a pulse at the end of the data stream
Data stream
Data
Data
Timing error
’1’
Figure 29. Automatic noise suppression
’1’
Digital Noise
(t
ee
< T
T
ee
Receiving mode,
bit check aktive
Lim_min
Bit–check
mode
OR T
is suppressed and the level at Pin DATA is High in that
case. The receiver changes back to receiving mode, if the
bit check was successful.
This way to suppress the noise is recommended if the data
stream is Manchester or Bi-phase coded and is active after
power on.
Figure 30 illustrates the behavior of the data output at the
end of a data stream. Note that if the last period of the data
stream is a high period (rising edge to falling edge), a
pulse occurs on Pin DATA. The length of the pulse
depends on the selected baud-rate range.
T
Lim_max
Digital Noise
Pulse
Bit check ok
< t
Bit check ok
ee
< T
Digital noise
Lim_min_2T
Preburst
Bit–check mode
Preburst
Receiving mode,
data clock control
logic active
Receiving mode,
data clock control
logic active
OR t
ee
Data
Data
> T
Lim_max_2T
T5743N
Receiving mode,
bit check aktive
)
Digital Noise
Bit–check
mode
17 (34)

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