MAX5866ETM Maxim Integrated Products, MAX5866ETM Datasheet - Page 20

• Manufacturer Part Number: MAX5866ETM
• Description: CODECs
• Manufacturer: Maxim Integrated Products

Specifications of MAX5866ETM

• Lead Free Status / Rohs Status: No

Ultra-Low-Power, High-Dynamic-
Performance, 60Msps Analog Front End
Figure 8. Balun-Transformer-Coupled Differential-to-Single-
Ended Output Drive for DACs
Figure 9. Single-Ended Drive for ADCs
20
V
V
IN
IN
______________________________________________________________________________________
100Ω
100Ω
100Ω
100Ω
MAX5866
0.1µF
0.1µF
REFP
REFN
REFP
REFN
QD+
QD-
ID+
ID-
1kΩ
1kΩ
1kΩ
1kΩ
R
50Ω
R
50Ω
0.1µF
0.1µF
ISO
ISO
22pF
22pF
22pF
22pF
R
50Ω
C
50Ω
C
R
C
C
ISO
IN
ISO
IN
IN
IN
V
V
OUT
OUT
INA+
COM
INA-
INB+
INB-
MAX5866
Drive the MAX5866 ADCs with op amps when a balun
transformer is not available. Figures 9 and 10 show the
ADCs being driven by op amps for AC-coupled single-
ended, and DC-coupled differential applications.
Amplifiers such as the MAX4354/MAX4454 provide
high speed, high bandwidth, low noise, and low distor-
tion to maintain the input-signal integrity. Figure 10 can
also be used to interface with the DAC differential ana-
log outputs to provide gain or buffering. The DAC dif-
ferential analog outputs cannot be used in single-
ended mode because of the internally generated
1.4VDC common-mode level. Also, the DAC analog
outputs are designed to drive a differential input stage
with input impedance ≥70kΩ. If single-ended outputs
are desired, use an amplifier to provide differential-to-
single-ended conversion and select an amplifier with
proper input common-mode voltage range.
The MAX5866 can be used in diverse applications oper-
ating FDD or TDD modes. The MAX5866 operates in Xcvr
mode for FDD applications such as WCDMA3GPP (FDD)
and 4G technologies. Also, the MAX5866 can switch
between Tx and Rx modes for TDD applications like
TD-SCDMA, WCDMA-3GPP (TDD), IEEE 802.11a/b/g,
and IEEE 802.16.
In FDD mode, the ADC and DAC operate simultaneously.
The ADC bus and DAC bus are dedicated and must be
connected in 18-bit parallel (8-bit ADC and 10-bit DAC)
to the digital baseband processor. Select Xcvr mode
through the 3-wire serial interface and use the conversion
clock to latch data. In FDD mode, the MAX5866 uses
96mW power at f
the ADC and DAC operating simultaneously.
In TDD mode, the ADC and DAC operate independent-
ly. The ADC and DAC bus are shared and can be con-
nected together, forming a single 10-bit parallel bus to
the digital baseband processor. Using the 3-wire serial
interface, select between Rx mode to enable the ADC
and Tx mode to enable the DAC. When operating in Rx
mode, the DAC does not transmit because the core is
disabled and in Tx mode, the ADC bus is tri-state. This
eliminates any unwanted spurious emissions and pre-
vents bus contention. In TDD mode, the MAX5866 uses
80mW power in Rx mode at f
DAC uses 52.5mW in Tx mode.
CLK
= 60MHz. This is the total power of
Using Op-Amp Coupling
FDD and TDD Modes
CLK
= 60MHz, and the