PIC16LF1933-E/MV Microchip Technology, PIC16LF1933-E/MV Datasheet - Page 270
PIC16LF1933-E/MV
Manufacturer Part Number
PIC16LF1933-E/MV
Description
IC MCU 8BIT 7KB FLASH 28UQFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1933-IMV.pdf
(430 pages)
Specifications of PIC16LF1933-E/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC16(L)F1933
REGISTER 24-2:
DS41575A-page 270
bit 3-0
Note 1:
2:
3:
4:
5:
In Master mode, the overflow bit is not set since each new reception (and transmission) is initiated by writing to the
SSPBUF register.
When enabled, these pins must be properly configured as input or output.
When enabled, the SDA and SCL pins must be configured as inputs.
SSPADD values of 0, 1 or 2 are not supported for I
SSPADD value of ‘0’ is not supported. Use SSPM = 0000 instead.
SSPM<3:0>: Synchronous Serial Port Mode Select bits
0000 = SPI Master mode, clock = F
0001 = SPI Master mode, clock = F
0010 = SPI Master mode, clock = F
0011 = SPI Master mode, clock = TMR2 output/2
0100 = SPI Slave mode, clock = SCK pin, SS pin control enabled
0101 = SPI Slave mode, clock = SCK pin, SS pin control disabled, SS can be used as I/O pin
0110 = I
0111 = I
1000 = I
1001 = Reserved
1010 = SPI Master mode, clock = F
1011 = I
1100 = Reserved
1101 = Reserved
1110 = I
1111 = I
SSPCON1: SSP CONTROL REGISTER 1 (CONTINUED)
2
2
2
2
2
2
C Slave mode, 7-bit address
C Slave mode, 10-bit address
C Master mode, clock = F
C firmware controlled Master mode (slave idle)
C Slave mode, 7-bit address with Start and Stop bit interrupts enabled
C Slave mode, 10-bit address with Start and Stop bit interrupts enabled
OSC
OSC
OSC
OSC
OSC
Preliminary
/4
/16
/64
/(4 * (SSPADD+1))
/ (4 * (SSPADD+1))
2
C mode.
(5)
(4)
2011 Microchip Technology Inc.
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