PIC16LF1933-E/MV Microchip Technology, PIC16LF1933-E/MV Datasheet - Page 33
PIC16LF1933-E/MV
Manufacturer Part Number
PIC16LF1933-E/MV
Description
IC MCU 8BIT 7KB FLASH 28UQFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1933-IMV.pdf
(430 pages)
Specifications of PIC16LF1933-E/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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TABLE 3-9:
2011 Microchip Technology Inc.
200h
201h
202h
203h
204h
205h
206h
207h
208h
209h
20Ah
20Bh
20Ch
20Dh
20Eh
20Fh
210h
211h
212h
213h
214h
215h
216h
217h
218h
219h
21Ah
21Bh
21Ch
21Dh
21Eh
21Fh
Legend:
Note
Address
Bank 4
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1, 2)
(2)
1:
2:
3:
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
—
WPUB
—
—
WPUE
SSPBUF
SSPADD
SSPMSK
SSPSTAT
SSPCON1
SSPCON2
SSPCON3
—
—
—
—
—
—
—
—
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred
to the upper byte of the program counter.
These registers can be addressed from any bank.
Unimplemented, read as ‘1’.
Name
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to Address Data Memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to Address Data Memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Unimplemented
Unimplemented
Synchronous Serial Port Receive Buffer/Transmit Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
ACKTIM
WPUB7
WCOL
GCEN
Bit 7
SMP
GIE
—
—
—
—
Write Buffer for the upper 7 bits of the Program Counter
ACKSTAT
WPUB6
SSPOV
PCIE
Bit 6
PEIE
CKE
—
—
—
TMR0IE
WPUB5
SSPEN
ACKDT
Bit 5
SCIE
D/A
—
—
—
Preliminary
WPUB4
ACKEN
BOEN
INTE
Bit 4
CKP
TO
—
P
ADD<7:0>
MSK<7:0>
WPUB3
WPUE3
SDAHT
RCEN
IOCIE
Bit 3
PD
S
BSR<4:0>
TMR0IF
WPUB2
SBCDE
Bit 2
R/W
PEN
—
SSPM<3:0>
Z
PIC16(L)F1933
WPUB1
RSEN
AHEN
Bit 1
INTF
DC
UA
—
WPUB0
DHEN
IOCIF
Bit 0
SEN
BF
—
C
DS41575A-page 33
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 0000 0000 0000
1111 1111 1111 1111
---- 1--- ---- 1---
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
1111 1111 1111 1111
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
POR, BOR
Value on
—
—
—
—
—
—
—
—
—
—
—
Value on all
Resets
other
—
—
—
—
—
—
—
—
—
—
—
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