DF2117RVLP20HV Renesas Electronics America, DF2117RVLP20HV Datasheet - Page 249
DF2117RVLP20HV
Manufacturer Part Number
DF2117RVLP20HV
Description
MCU 16BIT FLASH 3V 160K 144-LGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of DF2117RVLP20HV
Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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2.2.65 (1)
SUB (SUBtract binary)
Operation
Rd – Rs
Assembly-Language Format
SUB.B Rs, Rd
Operand Size
Byte
Description
This instruction subtracts the contents of an 8-bit register Rs (source operand) from the contents of
an 8-bit register Rd (destination operand) and stores the result in the 8-bit register Rd.
Available Registers
Rd: R0L to R7L, R0H to R7H
Rs: R0L to R7L, R0H to R7H
Operand Format and Number of States Required for Execution
Register direct
Addressing
Mode
Rd
SUB (B)
Mnemonic
SUB.B
Operands
Rs, Rd
1st byte
1
8
Condition Code
H: Set to 1 if there is a borrow at bit 3;
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Set to 1 if there is a borrow at bit 7;
2nd byte
rs
Instruction Format
otherwise cleared to 0.
cleared to 0.
cleared to 0.
cleared to 0.
otherwise cleared to 0.
Rev. 4.00 Feb 24, 2006 page 233 of 322
—
I
rd
UI H
—
Section 2 Instruction Descriptions
3rd byte
—
U
N
4th byte
REJ09B0139-0400
Subtract Binary
Z
V
States
No. of
C
1
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