HD6473837FV Renesas Electronics America, HD6473837FV Datasheet - Page 227

• Manufacturer Part Number: HD6473837FV
• Description: IC H8/3837 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD6473837FV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: SCI
• Peripherals: LCD, PWM
• Number Of I /o: 84
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: OTP
• Eeprom Size: -
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-BQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.6
9.6.1
Timer G is an 8-bit timer, with input capture functions for separately capturing the rising edge and
falling edge of pulses input at the input capture pin (input capture input signal). Timer G has a
built-in noise canceller circuit that can eliminate high-frequency noise from the input capture
signal, enabling accurate measurement of its duty cycle. When timer G is not used for input
capture, it functions as an 8-bit interval timer.
Features
Features of timer G are given below.
210
Choice of four internal clock sources ( /64, /32, /2,
Input capture function
Separate input capture registers are provided for the rising and falling edges.
Counter overflow detection
Can detect whether overflow occurred when the input capture signal was high or low.
Choice of counter clear triggers
The counter can be cleared at the rising edge, falling edge, or both edges of the input capture
signal.
Two interrupt sources
Interrupts can be requested by input capture and by overflow. For input capture, the rising or
falling edge can be selected.
Built-in noise-canceller circuit
The noise canceller circuit can eliminate high-frequency noise in the input capture signal.
Operates in subactive and subsleep modes
When
subsleep modes.
Timer G
Overview
W
/2 is selected as the internal clock source, timer G can operate in the subactive and
W
/2)