MT48LC32M8A2P-7E:DTR Micron Technology Inc, MT48LC32M8A2P-7E:DTR Datasheet - Page 79

• Manufacturer Part Number: MT48LC32M8A2P-7E:DTR
• Manufacturer: Micron Technology Inc

Specifications of MT48LC32M8A2P-7E:DTR

• Lead Free Status / Rohs Status: Compliant

Figure 50: Single WRITE Without Auto Precharge
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
Command
BA0, BA1
Address
DQM
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
Bank
T0
Row
Row
t CMH
t AH
t AH
t AH
t CKH
t RCD
t RAS
t RC
t CK
Note:
T1
NOP
1. For this example, BL = 1 and the WRITE burst is followed by a manual PRECHARGE.
Disable auto precharge
t CL
t CMS
t DS
Column m
Bank
WRITE
T2
D
t CMH
IN
t DH
t CH
t WR
T3
NOP
79
T4
NOP
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Single bank
PRECHARGE
All banks
Bank
T5
256Mb: x4, x8, x16 SDRAM
T6
NOP
t RP
PRECHARGE Operation
© 1999 Micron Technology, Inc. All rights reserved.
Bank
Row
ACTIVE
T7
T8
NOP
Don’t Care