DS21552L+ Maxim Integrated Products, DS21552L+ Datasheet - Page 118

• Manufacturer Part Number: DS21552L+
• Description: IC TXRX T1 1-CHIP 5V 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21552L+

• Function: Single-Chip Transceiver
• Interface: E1, HDLC, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 64 Kbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 75 mA (Typ)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Ic Interface Type: Parallel, Serial
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 100
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 21-12 TRANSMIT SIDE 2.048 MHz BOUNDARY TIMING (with elastic
store enabled)
Notes:
1. TSER data in channels 1, 5, 9, 13, 17, 21, 25, and 29 is ignored
2. TCHBLK is programmed to block channel 31 (if the TPCSI bit is set, then the signaling data at TSIG
3. TCHBLK is forced to one in the same channels as TSER is ignored (see Note 1)
4. The F-bit position for the T1 frame is sampled and passed through the transmit side elastic store into
TCHBLK
will be ignored).
the MSB bit position of channel 1. (normally the transmit side formatter overwrites the F-bit
position unless the formatter is programmed to pass-through the F-bit position)
TSYSCLK
TSSYNC
TCHCLK
TSER
TSIG
2,3
1
CHANNEL 31
CHANNEL 31
A
B
C/A D/B
LSB MSB
118 of 137
CHANNEL 32
CHANNEL 32
A
B
C/A D/B
LSB
F
4
CHANNEL 1
CHANNEL 1
A