PEB 4364 T V1.2 Infineon Technologies, PEB 4364 T V1.2 Datasheet - Page 258

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PEB 4364 T V1.2

Manufacturer Part Number
PEB 4364 T V1.2
Description
IC SLIC VOICE ACCESS PDSO-36
Manufacturer
Infineon Technologies
Series
DuSLICr
Datasheet

Specifications of PEB 4364 T V1.2

Function
Dual Channel Subscriber Line Interface Circuit (DuSLIC)
Interface
IOM-2, PCM
Number Of Circuits
2
Voltage - Supply
3.3 V ~ 5 V
Current - Supply
105mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-PDSO
Includes
DTMF Generator and Decoder, Line Echo Cancellation (LEC), Teletax (TTX) Generation, Universal Tone Detection (UTD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB4364TV1.2XT
SP000007728
Bit
Tone End Detection Time for Universal Tone Detection:
ETIME = ETime[ms]/4
ETime must be entered in multiples of 4 ms.
0 ms ETime 1000 ms
Figure 65
5.2.3.4
Table 69
values.
Preliminary Data Sheet
56
U T D i-O K b it
(IN T R E G 3 )
U T D i-O K b it
(IN T R E G 3 )
T o n e
1
0
1
0
1
0
H
UTD-ETIME
shows recommended NLP register values and the respective parameter
Recommended NLP Coefficients
7
Example for UTD Tone End Detection Timing
6
UTD Tone End Detection Time
E T im e
E B R K T im e
5
E B R K T im e
4
258
ETIME
3
E T im e
2
duslic_0014_EBRK_timing
1
DS3, 2003-07-11
DuSLIC
0
Y
t
t
t

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