SC68C752BIB48,157 NXP Semiconductors, SC68C752BIB48,157 Datasheet - Page 12
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SC68C752BIB48,157
Manufacturer Part Number
SC68C752BIB48,157
Description
IC UART DUAL 48LQFP
Manufacturer
NXP Semiconductors
Datasheet
1.SC68C752BIBS128.pdf
(48 pages)
Specifications of SC68C752BIB48,157
Number Of Channels
2, DUART
Package / Case
48-LQFP
Fifo's
64 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Data Rate
5 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.25 V
Supply Current
4.5 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
2.5 V or 3.3 V or 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935278767157
SC68C752BIB48
SC68C752BIB48
SC68C752BIB48
SC68C752BIB48
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC68C752BIB48,157
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
SC68C752B_4
Product data sheet
6.4 Reset
Table 5
Table 5.
Remark: Registers DLL, DLM, SPR, XON1, XON2, XOFF1, XOFF2 are not reset by the
top-level reset signal RESET, that is, they hold their initialization values during reset.
Table 6
Table 6.
Register
Interrupt Enable Register
Interrupt Identification Register
FIFO Control Register
Line Control Register
Modem Control Register
Line Status Register
Modem Status Register
Enhanced Feature Register
Receiver Holding Register
Transmitter Holding Register
Transmission Control Register
Trigger Level Register
Signal
TXn
RTSn
DTRn
RXRDYn
TXRDYn
summarizes the state of register after reset.
summarizes the state of registers after reset.
Register reset functions
Signal RESET functions
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
Rev. 04 — 20 January 2010
Reset control
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
Reset control
RESET
RESET
RESET
RESET
RESET
Reset state
all bits cleared
bit 0 is set; all other bits cleared
all bits cleared
reset to 0001 1101 (1Dh)
all bits cleared
bits 5 and 6 set; all other bits cleared
bits 0 to 3 cleared; bits 4 to 7 input signals
all bits cleared
pointer logic cleared
pointer logic cleared
all bits cleared
all bits cleared
Reset state
HIGH
HIGH
HIGH
HIGH
LOW
SC68C752B
© NXP B.V. 2010. All rights reserved.
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