SC28L202A1DGG/G:11 NXP Semiconductors, SC28L202A1DGG/G:11 Datasheet - Page 69
![IC UART DUAL W/FIFO 56-TSSOP](/photos/6/90/69069/56-tssop_sml.jpg)
SC28L202A1DGG/G:11
Manufacturer Part Number
SC28L202A1DGG/G:11
Description
IC UART DUAL W/FIFO 56-TSSOP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet
1.SC28L202A1DGG118.pdf
(77 pages)
Specifications of SC28L202A1DGG/G:11
Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
256 Byte
Voltage - Supply
3.3V, 5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
56-TFSOP (0.240", 6.10mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935279792112
SC28L202A1DGG/G
SC28L202A1DGG/G
SC28L202A1DGG/G
SC28L202A1DGG/G
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Philips Semiconductors
2005 Nov 01
Dual UART
NOTE: DACKN low requires two rising edges of X1 clock after CEN is low.
NOTE: DACKN low requires two rising edges of X1 clock after CEN is low.
X1/CLK
DACKN
D0–D7
A1–A4
X1/CLK
DACKN
D0–D7
RWN
A1–A4
CEN
RWN
CEN
t
DA
Figure 8. Bus Timing (Write Cycle) (68XXX mode)
Figure 7. Bus Timing (Read Cycle) (68XXX mode)
t
t
AS
AS
t
CS
t
VALID
CS
t
t
NOT
CSC
DD
t
t
DS
CSC
t
AH
t
AH
t
DCW
t
DCR
63
DATA VALID
t
DAT
t
DAT
t
RWD
t
RWD
t
t
CH
t
CH
t
DF
DH
SD00730
SD00731
SC28L202
Product data sheet
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