AT32UC3A1256AU Atmel Corporation, AT32UC3A1256AU Datasheet - Page 54

• Manufacturer Part Number: AT32UC3A1256AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A1256AU

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 69
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32058KS–AVR32–01/12
Figure 12-3. SMC Signals for NRD and NRW Controlled Accesses.
12.9.1
A0/A1/NBS[3:0]
D0 - D15
A2-A25
NWE
NRD
NCS
SDRAM Signals
These timings are given for 10 pF load on SDCK and 40 pF on other signals.
Table 12-27. SDRAM Clock Signal.
Note:
Table 12-28. SDRAM Clock Signal.
Symbol
1/(t
Symbol
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SMC9
SMC19
CPSDCK
1. The maximum frequency of the SDRAMC interface is the same as the max frequency for the
SMC7
SMC20
1
2
3
4
5
6
7
8
9
10
SMC3
SMC4
SMC5
SMC6
)
SMC8
HSB.
Parameter
SDRAM Controller Clock Frequency
Parameter
SDCKE High before SDCK Rising Edge
SDCKE Low after SDCK Rising Edge
SDCKE Low before SDCK Rising Edge
SDCKE High after SDCK Rising Edge
SDCS Low before SDCK Rising Edge
SDCS High after SDCK Rising Edge
RAS Low before SDCK Rising Edge
RAS High after SDCK Rising Edge
SDA10 Change before SDCK Rising Edge
SDA10 Change after SDCK Rising Edge
SMC45
SMC43
SMC42
SMC37
SMC38
SMC39
SMC40
SMC41
SMC44
SMC9
SMC1
SMC2
SMC8
SMC7
SMC3
SMC4
SMC5
SMC6
1/(t
Max
SMC33
cpcpu
AT32UC3A
(1)
Min
SMC23
7.4
3.2
2.9
7.5
1.6
7.2
2.3
7.6
1.9
7
)
SMC24
SMC32
Units
SMC31
SMC25
SMC26
SMC29
SMC30
MHz
Units
ns
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