AT32UC3A1256AU Atmel Corporation, AT32UC3A1256AU Datasheet - Page 60

• Manufacturer Part Number: AT32UC3A1256AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A1256AU

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 69
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32058KS–AVR32–01/12
Table 12-30. SPI Timings
Notes:
12.12 MACB Characteristics
Table 12-31. Ethernet MAC Signals
Notes:
Table 12-32. Ethernet MAC MII Specific Signals
Symbol
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
Symbol
EMAC
EMAC
EMAC
Symbol
EMAC
EMAC
EMAC
EMAC
EMAC
EMAC
EMAC
EMAC
0
1
2
3
4
5
6
7
8
9
10
11
1
2
3
4
5
6
7
8
9
10
11
1. 3.3V domain: V
2. t
1. f: MCK frequency (MHz)
2. V
CPMCK
VDDIO
Parameter
MISO Setup time before SPCK rises (master)
MISO Hold time after SPCK rises (master)
SPCK rising to MOSI Delay (master)
MISO Setup time before SPCK falls (master)
MISO Hold time after SPCK falls (master)
SPCK falling to MOSI Delay (master)
SPCK falling to MISO Delay (slave)
MOSI Setup time before SPCK rises (slave)
MOSI Hold time after SPCK rises (slave)
SPCK rising to MISO Delay (slave)
MOSI Setup time before SPCK falls (slave)
MOSI Hold time after SPCK falls (slave)
: Master Clock period in ns.
Parameter
Setup for EMDIO from EMDC rising
Hold for EMDIO from EMDC rising
EMDIO toggling from EMDC falling
Parameter
Setup for ECOL from ETXCK rising
Hold for ECOL from ETXCK rising
Setup for ECRS from ETXCK rising
Hold for ECRS from ETXCK rising
ETXER toggling from ETXCK rising
ETXEN toggling from ETXCK rising
ETX toggling from ETXCK rising
Setup for ERX from ERXCK
from 3.0V to 3.6V, maximum external capacitor = 20 pF
VDDIO
from 3.0V to 3.6V, maximum external capacitor = 40 pF.
Load: 20pF
Load: 20pF
Load: 20pF
Load: 20pF
Load: 20pF
Load: 20pF
Load: 20pF
Load: 20pF
Load: 20pF
Load: 20pF
Load: 20pF
Conditions
Conditions
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
Conditions
(2)
(2)
(2)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
22 + (t
22 + (t
Min (ns)
Min (ns)
Min
CPMCK
CPMCK
1.5
0
0
0
0
1
3
0
3
0
1
)/2
)/2
(2)
(2)
AT32UC3A
Max
26.5
27
7
7
Max (ns)
Max (ns)
15
15
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
60