AT32UC3A1256AU Atmel Corporation, AT32UC3A1256AU Datasheet - Page 95

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AT32UC3A1256AU

Manufacturer Part Number
AT32UC3A1256AU
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A1256AU

Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
69
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A1256AU-AUR
Manufacturer:
Atmel
Quantity:
10 000
32058KS–AVR32–01/12
Table of Contents
1
2
3
4
5
6
7
8
9
10 Peripherals ............................................................................................. 24
Description ............................................................................................... 3
Configuration Summary .......................................................................... 4
Abbreviations ........................................................................................... 4
Blockdiagram ........................................................................................... 5
Signals Description ................................................................................. 8
Package and Pinout ............................................................................... 13
Power Considerations ........................................................................... 17
I/O Line Considerations ......................................................................... 20
Memories ................................................................................................ 21
4.1Processor and architecture .......................................................................................6
7.1Power Supplies .......................................................................................................17
7.2Voltage Regulator ....................................................................................................18
7.3Analog-to-Digital Converter (A.D.C) reference. .......................................................19
8.1JTAG pins ................................................................................................................20
8.2RESET_N pin ..........................................................................................................20
8.3TWI pins ..................................................................................................................20
8.4GPIO pins ................................................................................................................20
9.1Embedded Memories ..............................................................................................21
9.2Physical Memory Map .............................................................................................21
9.3Bus Matrix Connections ..........................................................................................22
10.1Peripheral address map ........................................................................................24
10.2CPU Local Bus Mapping .......................................................................................25
10.3Interrupt Request Signal Map ................................................................................27
10.4Clock Connections ................................................................................................29
10.5Nexus OCD AUX port connections .......................................................................30
10.6PDC handshake signals ........................................................................................30
10.7Peripheral Multiplexing on I/O lines .......................................................................31
10.8Oscillator Pinout ....................................................................................................34
10.9USART Configuration ............................................................................................34
10.10GPIO ...................................................................................................................35
AT32UC3A
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