AT32UC3A4128S Atmel Corporation, AT32UC3A4128S Datasheet - Page 154

• Manufacturer Part Number: AT32UC3A4128S
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A4128S

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: AES
• Sram (kbytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32002F–03/2010
Table 9-64.
Register
Index
34
35
36
37
38
39
40–65
64
65
66
67
68
69
70
71
72
73
74-75
76
77– 255
mtdr/mf
dr index
136
140
144
148
152
156
160-260
256
260
264
268
272
276
280
284
288
292
296-300
304
308-
1020
OCD Register Summary
Register
PC Breakpoint/Watchpoint Address 2A (BWA2A)
PC Breakpoint/Watchpoint Address 2B (BWA2B)
Data Breakpoint/Watchpoint Address 3A (BWA3A)
Data Breakpoint/Watchpoint Address 3B (BWA3B)
Breakpoint/Watchpoint Data 3A (BWD3A)
Breakpoint/Watchpoint Data 3B (BWD3B)
Reserved
Nexus Configuration (NXCFG)
Debug Instruction Register (DINST)
Debug Program Counter (DPC)
Reserved
Debug Communication CPU Register (DCCPU)
Debug Communication Emulator Register (DCEMU)
Debug Communication Status Register (DCSR)
Ownership Trace Process ID (PID)
Debug Communication Control Register (DCCR)
Peripheral Debug Register(PDBG)
Reserved
AUX port Control (AXC)
Reserved
Access
Type
R/W
R/W
R/W
R/W
R/W
R/W
—
R
R/W
R/W
—
R/W
R/W
R/W
R/W
R/W
R/W
—
R/W
—
AVR32
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