AT32UC3A4256 Atmel Corporation, AT32UC3A4256 Datasheet - Page 209
AT32UC3A4256
Manufacturer Part Number
AT32UC3A4256
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A4256
Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A4256S-C1UR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT32UC3A4256S-U
Manufacturer:
ST
Quantity:
79
Part Number:
AT32UC3A4256S-U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 209 of 1012
- Download datasheet (16Mb)
Figure 15-33. Page Mode Read Protocol (Address MSB and LSB Are Defined in
15.6.9.2
32072G–11/2011
A[MSB]
D[15:0]
A[LSB]
CLK_SMC
NRD
NCS
Byte access type in page mode
The NRD and NCS signals are held low during all read transfers, whatever the programmed val-
ues of the setup and hold timings in the User Interface may be. Moreover, the NRD and NCS
timings are identical. The pulse length of the first access to the page is defined with the
PULSE.NCSRDPULSE field value. The pulse length of subsequent accesses within the page
are defined using the PULSE.NRDPULSE field value.
In page mode, the programming of the read timings is described in
Table 15-7.
The SMC does not check the coherency of timings. It will always apply the NCSRDPULSE tim-
ings as page access timing (t
programmed value for t
The byte access type configuration remains active in page mode. For 16-bit or 32-bit page mode
devices that require byte selection signals, configure the MODE.BAT bit to zero (byte select
access type).
Parameter
READMODE
NCSRDSETUP
NCSRDPULSE
NRDSETUP
NRDPULSE
NRDCYCLE
NCSRDPULSE
Programming of Read Timings in Page Mode
t
pa
Value
‘x’
‘x’
t
‘x’
t
‘x’
pa
sa
pa
is shorter than the programmed value for t
pa
) and the NRDPULSE for accesses to the page (t
Definition
No impact
No impact
Access time of first access to the page
No impact
Access time of subsequent accesses in the page
No impact
NRDPULSE
t
sa
Table 15-6 on page
NRDPULSE
t
sa
Table 15-7 on page
sa
.
208)
sa
), even if the
209:
209
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