AT32UC3C164C Atmel Corporation, AT32UC3C164C Datasheet - Page 1231
AT32UC3C164C
Manufacturer Part Number
AT32UC3C164C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C164C
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
81
Ext Interrupts
100
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
19
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3C164C-AUR
Manufacturer:
ATMEL
Quantity:
1 240
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39.6.5.1
39.6.5.2
39.6.5.3
39.6.6
39.6.6.1
Table 39-29. aWire Packet Format
32117C–AVR-08/11
Field
COMMAND/
RESPONSE
LENGTH
SYNC
DATA
CRC
Functional Description
I/O Lines
Power Management
Clocks
aWire Communication Protocol
Number of bytes
1
1
2
LENGTH
2
The pin used by AW is multiplexed with the RESET_N pin. The reset functionality is the default
function of this pin. To enable the aWire functionality on the RESET_N pin the user must enable
the AW either by sending the enable sequence over the RESET_N pin from an external aWire
master or by enabling the aWire user interface.
In 2-pin mode data is received on the RESET_N line, but transmitted on the DATAOUT line.
After sending the 2_PIN_MODE command the DATAOUT line is automatically enabled. All other
peripheral functions on this pin is disabled.
When debugging through AW the system clocks are automatically turned on to allow debugging
in sleep modes.
The aWire UART uses the internal 120 MHz RC oscillator (RC120M) as clock source for its
operation. When enabling the AW the RC120M is automatically started.
The AW is accessed through the RESET_N pin shown in
communicates through a UART operating at variable baud rate (depending on a sync pattern)
with one start bit, 8 data bits (LSB first), one stop bit, and no parity bits. The aWire protocol is
based upon command packets from an externalmaster and response packets from the slave
(AW). The master always initiates communication and decides the baud rate.
The packet contains a sync byte (0x55), a command/response byte, two length bytes (optional),
a number of data bytes as defined in the length field (optional), and two CRC bytes. If the com-
mand/response has the most significant bit set, the command/response also carries the optional
length and data fields. The CRC field is not checked if the CRC value transmitted is 0x0000.
CRC calculation
Description
Sync pattern (0x55).
Command from the master or
response from the slave.
The number of bytes in the DATA
field.
Data according to command/
response.
CRC calculated with the FCS16
polynomial.
Comment
Used by the receiver to set the baud rate
clock.
When the most significant bit is set the
command/response has a length field. A
response has the next most significant bit
set. A command does not have this bit set.
CRC value of 0x0000 makes the aWire
disregard the CRC if the master does not
support it.
Table 39-28 on page
AT32UC3C
1230. The AW
Optional
Yes
Yes
No
No
No
1231
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