AT89C51AC3 Atmel Corporation, AT89C51AC3 Datasheet - Page 108

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AT89C51AC3

Manufacturer Part Number
AT89C51AC3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51AC3

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
62.5
Sram (kbytes)
2.25
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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Figure 61. A/D Converter clock
ADC Standby Mode
IT ADC Management
Routines examples
108
AT89C51AC3
CPU Core Clock Symbol
CLOCK
CPU
When the ADC is not used, it is possible to set it in standby mode by clearing bit ADEN
in ADCON register. In this mode its power dissipation is about 1 µW.
An interrupt end-of-conversion will occurs when the bit ADEOC is activated and the bit
EADC is set. For re-arming the interrupt the bit ADEOC must be cleared by software.
Figure 62. ADC Interrupt Structure
1. Configure P1.2 and P1.3 in ADC channels
2. Start a standard conversion
3. Start a precision conversion (need interrupt ADC)
// configure channel P1.2 and P1.3 for ADC
// Enable the ADC
// The variable "channel" contains the channel to convert
// The variable "value_converted" is an unsigned int
// Clear the field SCH[2:0]
// Select channel
// Start conversion in standard mode
// Wait flag End of conversion
// Clear the End of conversion flag
// read the value
// The variable "channel" contains the channel to convert
// Enable ADC
ADCF = 0Ch
ADCON = 20h
ADCON and = F8h
ADCON | = channel
ADCON | = 08h
while((ADCON and 01h)! = 01h)
ADCON and = EFh
value_converted = (ADDH << 2)+(ADDL)
÷
2
ADEOC
ADCON.2
Prescaler ADCLK
EADC
IEN1.1
ADC Clock
ADCI
Converter
4383D–8051–02/08
A/D

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