AT89C51AC3 Atmel Corporation, AT89C51AC3 Datasheet - Page 48

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AT89C51AC3

Manufacturer Part Number
AT89C51AC3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51AC3

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
62.5
Sram (kbytes)
2.25
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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Programming the Flash Spaces
User
Extra Row
48
AT89C51AC3
Figure 25. Column Latches Loading Procedure
Note:
The following procedure is used to program the User space and is summarized in
Figure 26:
The following procedure is used to program the Extra Row space and is summarized in
Figure 26:
Load up to one page of data in the column latches from address 0000h to FFFFh.
Save and Disable the interrupts.
Launch the programming by writing the data sequence 50h followed by A0h in
FCON register (only from FM1).
The end of the programming indicated by the FBUSY flag cleared.
Restore the interrupts.
Load data in the column latches from address FF80h to FFFFh.
Save and Disable the interrupts.
Launch the programming by writing the data sequence 52h followed by A2h in
FCON register (only from FM1).
The end of the programming indicated by the FBUSY flag cleared.
Restore the interrupts.
The last page address used when loading the column latch is the one used to select the
page programming address.
Column Latches Mapping
Exec: MOVX @DPTR, A
Data memory Mapping
FCON = 00h (FPS = 0)
FCON = 08h (FPS=1)
Column Latches
Save and Disable IT
DPTR = Address
ACC = Data
Last Byte
Data Load
to load?
Restore IT
Loading
EA = 0
4383D–8051–02/08

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