AT89C51AC3 Atmel Corporation, AT89C51AC3 Datasheet - Page 85

• Manufacturer Part Number: AT89C51AC3
• Manufacturer: Atmel Corporation

Specifications of AT89C51AC3

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 60 MHz
• Cpu: 8051-12C
• Max I/o Pins: 32
• Spi: 1
• Uart: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 62.5
• Sram (kbytes): 2.25
• Eeprom (bytes): 2048
• Self Program Memory: API
• Operating Voltage (vcc): 3.0 to 5.5
• Timers: 4
• Isp: UART
• Watchdog: Yes

Functional Description
Figure 44. SPI Module Block Diagram
Operating Modes
4383D–8051–02/08
SPSCR
SPCON
SPIF
SPR2
SPEN
-
OVR
SSDIS
SPI
Control
MODF
MSTR
Figure 44 shows a detailed structure of the SPI Module.
The Serial Peripheral Interface can be configured in one of the two modes: Master mode
or Slave mode. The configuration and initialization of the SPI Module is made through
two registers:
•
•
Once the SPI is configured, the data exchange is made using:
•
During an SPI transmission, data is simultaneously transmitted (shifted out serially) and
received (shifted in serially). A serial clock line (SCK) synchronizes shifting and sam-
pling on the two serial data lines (MOSI and MISO). A Slave Select line (SS) allows
individual selection of a Slave SPI device; Slave devices that are not selected do not
interfere with SPI bus activities.
Internal Bus
The Serial Peripheral Control register (SPCON)
The Serial Peripheral Status and Control Register (SPSCR)
The Serial Peripheral DATa register (SPDAT)
SPTE
CPOL CPHA
UARTM SPTEIE MODFIE
SPR1
SPR0
SPDAT
Transmit Data Register
Receive Data Register
PERIPH
FCLK
7
Clock
Logic
Shift Register
6
5
4
3
SPI Interrupt
Request
2
1
0
M
S
Pin
Control
Logic
8-bit bus
1-bit signal
MOSI
MISO
SCK
SS
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