ATmega16HVB Atmel Corporation, ATmega16HVB Datasheet - Page 118

• Manufacturer Part Number: ATmega16HVB
• Manufacturer: Atmel Corporation

Specifications of ATmega16HVB

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 17
• Ext Interrupts: 15
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

20.3.2
118
ATmega16HVB/32HVB
Cell inputs
The V-ADC features one input channel for each battery cell to be able to measure each cell indi-
vidually and to measure the total battery voltage through the input pins NV, PV1, PV2, PV3 and
PV4. Note that the internal Cell Balancing uses the same pins to bypass balancing current (see
”Cell balancing” on page
the V-ADC should not do conversion on the selected channel, as the internal Cell balancing will
affect the conversion result.
The V-ADC is designed to operate on PV1 pin voltages above 2V. If the battery cell voltage on
PV1 input falls below 2V the upper cell voltage appears to be lower than the its actual value. To
avoid that cells get potentially overcharged software should keep the cells in balance using the
internal Cell Balancing. See
When not using all the cell inputs, the unused cells should be connected to the cell below. An
example external coupling in 3-cell mode is shown in
not used, it is recommended to connect the input through an external resistance to limit inverse
coupling current. This is to be able to protect the battery if cells are reversed coupled during
production.
Figure 20-3. A 3-cell mode connection.
R
R
R
R
R
151) for details for balancing the battery cells. When balancing a cell
”Cell balancing” on page 151
C
C
C
PV4
PV3
PV2
PV1
NV
ATmega16HVB/32HVB
Figure
for details.
20-3. Note that even if the input is
8042D–AVR–10/11