ATmega16HVB Atmel Corporation, ATmega16HVB Datasheet - Page 149

• Manufacturer Part Number: ATmega16HVB
• Manufacturer: Atmel Corporation

Specifications of ATmega16HVB

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 17
• Ext Interrupts: 15
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

25.3.3
25.3.4
25.4
25.4.1
8042D–AVR–10/11
Register description
Deep under voltage operation with pre-charge FET
Operation in reset and power off
FCSR – FET Control and Status Register
If a charger without pre-charge functionality is used, the Pre-charge FET will provide the current
path and the pre-charge resistor will limit the charge current during charging of deeply over-dis-
charged cells. After reaching sufficient battery voltage it is safe to turn on the Charge FET to
increase the charge current. Deep Under Voltage Operation with Pre-charge FET is supported
through PC5, which is a high voltage open drain pin. For configuration and usage of this pin, see
”High voltage I/O ports” on page
In reset and power-off the C-FET and D-FET will be automatically turned off. Safety is remained
by active pulling OC/OD hard to ground.
• Bits 7:4 – Reserved
These bits are reserved in the Atmel ATmega16HVB/32HVB, and will always read as zero.
• Bit 3 – DUVRD: Deep Under-voltage Recovery Disabled
When the DUVRD is cleared (zero), the FET Driver will be forced to operate in Deep Under-volt-
age Recovery DUVR mode. See
charge FET” on page 147
during current protection or during internal reset, the DUVRD bit is overridden to one by hard-
ware in these cases. When this bit is set (one), Deep Under-voltage Recovery mode of the FET
Driver will be disabled. DUVR mode should not be used in 2-cell applications.
• Bit 2 – CPS: Current Protection Status
The CPS bit shows the status of the Current Protection. This bit is set (one) when a Current Pro-
tection is active, and cleared (zero) otherwise.
• Bit 1 – DFE: Discharge FET Enable
When the DFE bit is cleared (zero), the Discharge FET will be disabled regardless of the state of
the Battery Protection circuitry. When this bit is set (one), the Discharge FET is enabled. This bit
will automatically be cleared by the CBP circuitry when Current Protection is activated. When
this bit is cleared, Short-circuit, Discharge High-current and Discharge Over-current are disabled
regardless of the settings in the BPCR Register.
• Bit 0 – CFE: Charge FET Enable
When the CFE bit is cleared (zero), the Charge FET will be disabled regardless of the state of
the Battery Protection circuitry. When this bit is set (one), the Charge FET is enabled. This bit
will automatically be cleared by the CBP circuitry when Current Protection is activated. When
this bit is cleared and the DUVRD bit is set, Charge High-current Protection and Charge Over-
current Protection are disabled regardless of the settings in the BPCR Register. When the
Bit
(0xF0)
Read/Write
Initial Value
R
7
–
0
R
6
–
0
for details. To avoid that the FET driver tries to switch on the C-FET
62.
R
5
–
0
”DUVR – Deep under voltage recovery mode without pre-
R
4
–
0
DUVRD
ATmega16HVB/32HVB
R/W
3
1
CPS
R
2
0
DFE
R/W
1
0
CFE
R/W
0
0
FCSR
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