ATmega325P Atmel Corporation, ATmega325P Datasheet - Page 206

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ATmega325P

Manufacturer Part Number
ATmega325P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega325P

Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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21. Analog to Digital Converter
21.1
21.2
206
Features
Overview
ATmega325P/3250P
The ATmega325P/3250P features a 10-bit successive approximation ADC. The ADC is con-
nected to an 8-channel Analog Multiplexer which allows eight single-ended voltage inputs
constructed from the pins of Port F. The single-ended voltage inputs refer to 0V (GND).
The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is
held at a constant level during conversion. A block diagram of the ADC is shown in
The ADC has a separate analog supply voltage pin, AVCC. AV
0.3V from V
pin.
Internal reference voltages of nominally 1.1V or AVCC are provided On-chip. The voltage refer-
ence may be externally decoupled at the AREF pin by a capacitor for better noise performance.
The PRADC, in
the ADC module.
10-bit Resolution
0.5 LSB Integral Non-linearity
± 2 LSB Absolute Accuracy
13 µs - 260 µs Conversion Time (50 kHz to 1 MHz ADC clock)
Up to 76.9 kSPS at Maximum Resolution (200 kHz ADC clock)
Eight Multiplexed Single Ended Input Channels
Optional Left Adjustment for ADC Result Readout
0 - V
Selectable 1.1V ADC Reference Voltage
Free Running or Single Conversion Mode
ADC Start Conversion by Auto Triggering on Interrupt Sources
Interrupt on ADC Conversion Complete
Sleep Mode Noise Canceler
CC
ADC Input Voltage Range
CC
. See the paragraph
”PRR – Power Reduction Register” on page 44
”ADC Noise Canceler” on page 212
must be written to zero to enable
CC
must not differ more than ±
on how to connect this
8023F–AVR–07/09
Figure
21-1.

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