ATmega325P Atmel Corporation, ATmega325P Datasheet - Page 44

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ATmega325P

Manufacturer Part Number
ATmega325P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega325P

Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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9.11.3
8023F–AVR–07/09
PRR – Power Reduction Register
The BODS bit is active three clock cycles after it is set. A sleep instruction must be executed
while BODS is active in order to turn off the BOD for the actual sleep mode. The BODS bit is
automatically cleared after three clock cycles.
• Bit 5 – BODSE: BOD Sleep Enable
BODSE enables setting of BODS control bit, as explained in BODS bit description. BOD disable
is controlled by a timed sequence.
• Bits 7:4- Res: Reserved bits
These bits are reserved and will always read as zero.
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1
Writing logic one to this bit shuts down the Timer/Counter1 module. When Timer/Counter1 is
enabled, operation will continue like before the shutdown.
• Bit 2 - PRSPI: Power Reduction Serial Peripheral Interface
Writing logic one to this bit shuts down the Serial Peripheral Interface by stopping the clock to
the module. When waking up the SPI again, the SPI should be re-initialized to ensure proper
operation.
• Bit 1 - PRUSART: Power Reduction USART
Writing logic one to this bit shuts down the USART by stopping the clock to the module. When
waking up the USART again, the USART should be re-initialized to ensure proper operation.
• Bit 0 - PRADC: Power Reduction ADC
Writing logic one to this bit shuts down the ADC. The ADC must be disabled before shut down.
The analog comparator cannot use the ADC input MUX when the ADC is shut down.
Note:
Bit
(0x64)
Read/Write
Initial Value
The Analog Comparator is disabled using the ACD-bit in the
and Status Register” on page
R
7
0
R
6
0
5
R
0
204.
R/W
4
0
PRTIM1
R/W
3
0
ATmega325P/3250P
PRSPI
R/W
2
0
”ACSR – Analog Comparator Control
PRUSART0
R/W
1
0
PRADC
R/W
0
0
PRR
44

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