ATmega48 Atmel Corporation, ATmega48 Datasheet - Page 256

• Manufacturer Part Number: ATmega48
• Manufacturer: Atmel Corporation

Specifications of ATmega48

• Flash (kbytes): 4 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 24
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

24.8.2
2545T–AVR–05/11
ADCSRA – ADC control and status register A
• Bits 3:0 – MUX3:0: Analog channel selection bits
The value of these bits selects which analog inputs are connected to the ADC. See
for details. If these bits are changed during a conversion, the change will not go in effect until this
conversion is complete (ADIF in ADCSRA is set).
Table 24-3.
• Bit 7 – ADEN: ADC enable
Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the
ADC off while a conversion is in progress, will terminate this conversion.
• Bit 6 – ADSC: ADC start conversion
In Single Conversion mode, write this bit to one to start each conversion. In Free Running mode,
write this bit to one to start the first conversion. The first conversion after ADSC has been written
after the ADC has been enabled, or if ADSC is written at the same time as the ADC is enabled,
will take 25 ADC clock cycles instead of the normal 13. This first conversion performs initializa-
tion of the ADC.
ADSC will read as one as long as a conversion is in progress. When the conversion is complete,
it returns to zero. Writing zero to this bit has no effect.
Bit
(0x7A)
Read/write
Initial value
MUX3..0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Input channel selections.
ADEN
R/W
7
0
ADSC
R/W
6
0
ADATE
Single ended input
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
1.1V (V
0V (GND)
R/W
5
0
BG
)
ADIF
R/W
4
0
ADIE
R/W
3
0
ADPS2
R/W
ATmega48/88/168
2
0
ADPS1
R/W
1
0
ADPS0
R/W
0
0
Table 24-3
ADCSRA
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