ATmega640 Atmel Corporation, ATmega640 Datasheet - Page 20
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ATmega640
Manufacturer Part Number
ATmega640
Description
Manufacturer
Atmel Corporation
Specifications of ATmega640
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
86
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
1
Uart
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
16
Input Capture Channels
4
Pwm Channels
15
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATmega640-16AU
Manufacturer:
OSRAM
Quantity:
12 000
Part Number:
ATmega640-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega640V-8AU
Manufacturer:
PHILIPS
Quantity:
56
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7.8.1
2549N–AVR–05/11
Interrupt Response Time
The interrupt execution response for all the enabled AVR interrupts is five clock cycles minimum.
After five clock cycles the program vector address for the actual interrupt handling routine is exe-
cuted. During these five clock cycle period, the Program Counter is pushed onto the Stack. The
vector is normally a jump to the interrupt routine, and this jump takes three clock cycles. If an
interrupt occurs during execution of a multi-cycle instruction, this instruction is completed before
the interrupt is served. If an interrupt occurs when the MCU is in sleep mode, the interrupt exe-
cution response time is increased by five clock cycles. This increase comes in addition to the
start-up time from the selected sleep mode.
A return from an interrupt handling routine takes five clock cycles. During these five clock cycles,
the Program Counter (three bytes) is popped back from the Stack, the Stack Pointer is incre-
mented by three, and the I-bit in SREG is set.
Assembly Code Example
C Code Example
sei
sleep; enter sleep, waiting for interrupt
; note: will enter sleep before any pending
; interrupt(s)
__enable_interrupt(); /* set Global Interrupt Enable */
__sleep(); /* enter sleep, waiting for interrupt */
/* note: will enter sleep before any pending interrupt(s) */
; set Global Interrupt Enable
ATmega640/1280/1281/2560/2561
20
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