ATmega64M1 Atmel Corporation, ATmega64M1 Datasheet - Page 31

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ATmega64M1

Manufacturer Part Number
ATmega64M1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega64M1

Flash (kbytes)
64 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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8.6
8.6.1
8209D–AVR–11/10
PLL
Internal PLL
This clock may be selected as the system clock by programming the CKSEL Fuses as shown in
Table 8-1 on page
hardware loads the pre-programmed calibration value into the OSCCAL Register and thereby
automatically calibrates the RC Oscillator. The accuracy of this calibration is shown as Factory
calibration in
By changing the OSCCAL register from SW, see
page
The accuracy of this calibration is shown as User calibration in
310.
When this Oscillator is used as the chip clock, the Watchdog Oscillator will still be used for the
Watchdog Timer and for the Reset Time-out. For more information on the pre-programmed cali-
bration value, see the section.
Table 8-5.
Notes:
When this Oscillator is selected, start-up times are determined by the SUT Fuses as shown in
Table 8-6 on page
Table 8-6.
Notes:
The internal PLL in ATmega16M1/32M1/64M1 generates a clock frequency that is 64× multi-
plied from nominally 1MHz input. The source of the 1MHz PLL input clock is the output of the
internal RC Oscillator which is divided down to 1MHz. See the
The PLL is locked on the RC Oscillator and adjusting the RC Oscillator via OSCCAL Register
will adjust the fast peripheral clock at the same time. However, even if the possibly divided RC
Oscillator is taken to a higher frequency than 1MHz, the fast peripheral clock frequency satu-
rates at 70MHz (worst case) and remains oscillating at the maximum frequency. It should be
noted that the PLL in this case is not locked any more with the RC Oscillator clock.
Power Conditions
BOD enabled
Fast rising power
Slowly rising power
34, it is possible to get a higher calibration accuracy than by using the factory calibration.
1. The device is shipped with this option selected
2. If 8MHz frequency exceeds the specification of the device (depends on V
1. If the RSTDISBL fuse is programmed, this start-up time will be increased to
2. The device is shipped with this option selected
Fuse can be programmed in order to divide the internal frequency by 8
14CK + 4.1ms to ensure programming mode can be entered
Frequency Range (MHz)
Table 28-1 on page
Internal Calibrated RC Oscillator Operating Modes
Start-up times for the internal calibrated RC Oscillator clock selection
31.
28. If selected, it will operate with no external components. During reset,
7.3 - 8.1
Start-up Time from Power-
down and Power-save
310.
Reserved
6 CK
6 CK
6 CK
ATmega16M1/32M1/64M1
“OSCCAL – Oscillator Calibration Register” on
Additional Delay from
Figure 8-3 on page
Reset (V
“Clock Characteristics” on page
14CK + 65ms
(1)(2)
14CK + 4.1ms
CKSEL3..0
14CK
0010
CC
(1)
= 5.0V)
(2)
CC
), the CKDIV8
32.
SUT1..0
00
01
10
11
31

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