ATtiny24A Atmel Corporation, ATtiny24A Datasheet - Page 158

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ATtiny24A

Manufacturer Part Number
ATtiny24A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny24A

Flash (kbytes)
2 Kbytes
Pin Count
14
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
12
Ext Interrupts
12
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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19. Memory Programming
19.1
158
Program And Data Memory Lock Bits
ATtiny24A/44A/84A
This section describes the different methods for programming ATtiny24A/44A/84A memories.
The ATtiny24A/44A/84A provides two lock bits which can be left unprogrammed (“1”) or can be
programmed (“0”) to obtain the additional security listed in
erased to “1” with the Chip Erase command.
The device has no separate boot loader section. The SPM instruction is enabled for the whole
Flash, if the SELFPRGEN fuse is programmed (“0”), otherwise it is disabled.
Program memory can be read out via the debugWIRE interface when the DWEN fuse is pro-
grammed, even if lock bits are set. Thus, when lock bit security is required, debugWIRE should
always be disabled by clearing the DWEN fuse.
Table 19-1.
Note:
Table 19-2.
Notes:
Lock bits can also be read by device firmware. See section
Data from Software” on page
LB2
LB1
LB Mode
Memory Lock Bits
1
2
3
“1” means unprogrammed, “0” means programmed.
1. Program fuse bits before programming LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
Lock Bit
Lock Bit Byte
Lock Bit Protection Modes.
LB2
1
1
0
(1) (2)
LB1
154.
1
0
0
Bit No
7
6
5
4
3
2
1
0
Protection Type
No memory lock features enabled.
Further programming of the Flash and EEPROM is disabled in
High-voltage and Serial Programming mode. The Fuse bits are
locked in both Serial and High-voltage Programming mode.
debugWire is disabled.
Further programming and verification of the Flash and EEPROM
is disabled in High-voltage and Serial Programming mode. The
Fuse bits are locked in both Serial and High-voltage
Programming mode.
Description
Lock bit
Lock bit
(1)
debugWire is disabled.
Table
“Reading Lock, Fuse and Signature
19-2. The lock bits can only be
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
8183D–AVR–04/11
(1)

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