ATtiny24A Atmel Corporation, ATtiny24A Datasheet - Page 160

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ATtiny24A

Manufacturer Part Number
ATtiny24A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny24A

Flash (kbytes)
2 Kbytes
Pin Count
14
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
12
Ext Interrupts
12
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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19.2.1
19.3
160
Device Signature Imprint Table
ATtiny24A/44A/84A
Latching of Fuses
Table 19-5.
Notes:
Note that fuse bits are locked if Lock Bit 1 (LB1) is programmed. Fuse bits should be pro-
grammed before lock bits. The status of fuse bits is not affected by chip erase.
Fuse bits can also be read by device firmware. See section
Data from Software” on page
Fuse values are latched when the device enters programming mode and changes to fuse values
have no effect until the part leaves programming mode. This does not apply to the EESAVE
Fuse which will take effect once it is programmed. Fuses are also latched on power-up.
The device signature imprint table is a dedicated memory area used for storing miscellaneous
device information, such as the device signature and oscillator calibaration data. Most of this
memory segment is reserved for internal use, as outlined in
Table 19-6.
Notes:
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
Address
0x00
0x01
0x02
0x03
0x04
0x05 ... 0x2A
(3)
(3)
1. See
2. Allows system clock to be output on pin. See
3. The default value results in maximum start-up time for the default clock source. See
4. The default setting results in internal RC Oscillator @ 8.0 MHz. See
1. See section “Signature Bytes” for more information.
2. See section “Calibration Byte” for more information.
(2)
(1)
(4)
(4)
(4)
(4)
on page 27
details.
Fuse Low Byte
Contents of Device Signature Imprint Table.
“System Clock Prescaler” on page 30
High Byte
Signature byte 0
Calibration data for internal oscillator
Signature byte 1
Reserved for internal use
Signature byte 2
Reserved for internal use
for details.
Bit No
154.
7
6
5
4
3
2
1
0
(1)
(1)
(1)
Description
Divide clock by 8
Clock Output Enable
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
for details.
(2)
“Clock Output Buffer” on page 30
“Reading Lock, Fuse and Signature
Table
19-6.
0 (programmed)
Default Value
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
Table 6-4 on page 27
8183D–AVR–04/11
for details.
Table 6-5
for

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