ATtiny48 Atmel Corporation, ATtiny48 Datasheet - Page 193

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ATtiny48

Manufacturer Part Number
ATtiny48
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny48

Flash (kbytes)
4 Kbytes
Pin Count
32
Max. Operating Frequency
12 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
28
Ext Interrupts
28
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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21.2.1
21.2.2
8008H–AVR–04/11
Enter Programming Mode
Considerations for Efficient Programming
When pulsing WR or OE, the command loaded determines the action executed. The different
Commands are shown in
Table 21-6.
The following algorithm puts the device in Parallel (High-voltage) Programming mode:
If the rise time of the V
tive algorithm can be used.
The loaded command and address are retained in the device during programming. For efficient
programming, the following should be considered.
1. Set Prog_enable pins listed in
2. Apply 4.5 – 5.5V between V
3. Wait 20 – 60 µs, and apply 11.5 – 12.5V to RESET.
4. Keep the Prog_enable pins unchanged for at least 10µs after the High-voltage has
5. Wait at least 300 µs before giving any parallel programming commands.
6. Exit Programming mode by power the device down or by bringing RESET pin to 0V.
1. Set Prog_enable pins listed in
2. Apply 4.5 – 5.5V between V
3. Monitor V
4. Keep the Prog_enable pins unchanged for at least 10µs after the High-voltage has
5. Wait until V
6. Exit Programming mode by power the device down or by bringing RESET pin to 0V.
Command Byte
1000 0000
0100 0000
0010 0000
0001 0000
0001 0001
0000 1000
0000 0100
0000 0010
0000 0011
V
the next 20 µs.
been applied to ensure the Prog_enable Signature has been latched.
V
been applied to ensure the Prog_enable Signature has been latched.
commands.
CC
CC
to 0V.
to 0V.
Command Byte Bit Coding
CC
CC
, and as soon as V
actually reaches 4.5 -5.5V before giving any parallel programming
Command Executed
Chip Erase
Write Fuse bits
Write Lock bits
Write Flash
Write EEPROM
Read Signature Bytes and Calibration byte
Read Fuse and Lock bits
Read Flash
Read EEPROM
CC
Table
is unable to fulfill the requirements listed above, the following alterna-
21-6.
CC
CC
Table 21-4 on page 192
Table 21-4 on page 192
CC
and GND. Ensure that V
and GND.
reaches 0.9 – 1.1V, apply 11.5 – 12.5V to RESET.
to “0000”, RESET pin to 0V and
to “0000”, RESET pin to 0V and
CC
reaches at least 1.8V within
ATtiny48/88
193

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