ATtiny88 Atmel Corporation, ATtiny88 Datasheet - Page 3

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ATtiny88

Manufacturer Part Number
ATtiny88
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny88

Flash (kbytes)
8 Kbytes
Pin Count
32
Max. Operating Frequency
12 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
28
Ext Interrupts
28
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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1.1
1.1.1
1.1.2
1.1.3
1.1.4
1.1.5
1.1.6
1.1.7
8008H–AVR–04/11
Pin Descriptions
VCC
AVCC
GND
Port A (PA3:0)
Port B (PB7:0)
Port C (PC7, PC5:0)
PC6/RESET
Digital supply voltage.
AV
be externally connected to V
mended this pin is connected to V
Canceling Techniques” on page
The following pins receive their supply voltage from AV
ages) PA[1:0]. All other I/O pins take their supply voltage from V
Ground.
Port A is a 4-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
PA[3:0] output buffers have symmetrical drive characteristics with both sink and source capabil-
ity. As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors
are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the
clock is not running.
This port is available in 32-lead TQFP, 32-pad QFN and 32-ball UFBGA packages, only.
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both sink and source capability.
As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are
activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock
is not running.
Depending on the clock selection fuse settings, PB6 can be used as input to the internal clock
operating circuit.
The various special features of Port B are elaborated in
69.
Port C is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
PC7 and PC[5:0] output buffers have symmetrical drive characteristics with both sink and source
capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
If the RSTDISBL Fuse is programmed, PC6 is used as an I/O pin. Note that the electrical char-
acteristics of PC6 differ from those of the other pins of Port C.
If the RSTDISBL Fuse is unprogrammed, PC6 is used as a reset input. A low level on this pin for
longer than the minimum pulse width will generate a reset, even if the clock is not running. The
CC
is the supply voltage pin for the A/D converter and a selection of I/O pins. This pin should
CC
172.
even if the ADC is not used. If the ADC is used, it is recom-
CC
through a low-pass filter, as described in
CC
“Alternate Functions of Port B” on page
: PC7, PC[5:0] and (in 32-lead pack-
CC
.
ATtiny48/88
“Analog Noise
3

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