ATtiny88 Atmel Corporation, ATtiny88 Datasheet - Page 31

• Manufacturer Part Number: ATtiny88
• Manufacturer: Atmel Corporation

Specifications of ATtiny88

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 28
• Ext Interrupts: 28
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

6.2.3
6.2.4
6.3
8008H–AVR–04/11
System Clock Prescaler
Internal 128 kHz Oscillator
Default Clock Source
When this oscillator is used as the chip clock, the Watchdog oscillator will still be used for the
Watchdog Timer and for the Reset Time-out. For more information on the pre-programmed cali-
bration value, see the section
When this oscillator is selected, start-up times are determined by the SUT Fuses as shown in
the table below.
Table 6-3.
Note:
The 128 kHz internal oscillator is a low power oscillator providing a clock of 128 kHz. The fre-
quency depends on supply voltage, temperature and patch variations. This clock may be
selected as the system clock by programming the CKSEL Fuses to “11”.
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table
Table 6-4.
Note:
The device is shipped with internal oscillator at 8.0 MHz and with the fuse CKDIV8 programmed,
resulting in 1.0 MHz system clock. The startup time is set to maximum and time-out period
enabled (CKSEL = 0b10, SUT = 0b10, CKDIV8 = 0). The default setting ensures that all users
can make their desired clock source setting using any available programming interface.
The ATtiny48/88 has a system clock prescaler, and the system clock can be divided by setting
the
system clock frequency and the power consumption when the requirement for processing power
SUT[1:0]
SUT[1:0]
“CLKPR – Clock Prescale Register” on page
10
00
01
11
00
01
10
11
6-4.
(2)
1. If the RSTDISBL fuse is programmed, this start-up time will be increased to 14CK + 4 ms to
2.
1. If the RSTDISBL fuse is programmed, this start-up time will be increased to 14CK + 4 ms to
The device is shipped with this option selected.
ensure programming mode can be entered.
ensure programming mode can be entered.
Power Conditions
BOD enabled
Fast rising power
Slowly rising power
Start-up Times for the Internal Calibrated Oscillator Clock Selection
Start-up Times for the 128 kHz Internal Oscillator
Power Conditions
BOD enabled
Fast rising power
Slowly rising power
“Calibration Byte” on page
from Power-down
from Power-down
Start-up Time
Start-up Time
6 CK
6 CK
6 CK
34. This feature can be used to decrease the
Reserved
Reserved
6 CK
6 CK
6 CK
190.
from Reset (V
ATtiny48/88
Additional Delay
Additional Delay
14CK + 64 ms
14CK + 4 ms
14CK + 64 ms
from Reset
14CK + 4 ms
14CK
14CK
(1)
CC
(1)
= 5.0V)
31