ATxmega128A3U Atmel Corporation, ATxmega128A3U Datasheet - Page 168

• Manufacturer Part Number: ATxmega128A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A3U

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.6
8331A–AVR–07/11
Counter Operation
buffer register and cleared on an UPDATE condition. This is shown for a compare register in
Figure 14-4 on page
Figure 14-4. Period and compare double buffering
When the CC channels are used for a capture operation, a similar double buffering mechanism
is used, but in this case the buffer valid flag is set on the capture event, as shown in
For capture, the buffer register and the corresponding CCx register act like a FIFO. When the
CC register is empty or read, any content in the buffer register is passed to the CC register. The
buffer valid flag is passed to set the CCx interrupt flag (IF) and generate the optional interrupt.
Figure 14-5. Capture double buffering.
Both the CCx and CCxBUF registers are available as an I/O register. This allows initialization
and bypassing of the buffer register and the double buffering function.
Depending on the mode of operation, the counter is cleared, reloaded, incremented, or decre-
mented at each timer/counter clock input.
UPDATE
"capture"
"INT/DMA
request"
168.
BV
IF
BV
EN
EN
CCxBUF
CCx
CNT
EN
EN
CNT
Atmel AVR XMEGA AU
CCxBUF
=
CCx
"write enable"
"match"
"data"
Figure
14-5.
168