ATxmega128A3U Atmel Corporation, ATxmega128A3U Datasheet - Page 192

• Manufacturer Part Number: ATxmega128A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A3U

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

15.6
15.6.1
15.6.2
8331A–AVR–07/11
Compare Channel
Waveform Generation
Single Slope PWM Generation
Figure 15-4. Changing the period
Each compare channel continuously compares the counter value with the CMPx register. If CNT
equals CMPx the comparator signals a match. For the Low Byte Timer/Counter the match will
set the Compare channel's interrupt flag at the next timer clock cycle, and the event and optional
interrupt is generated. The High Byte Timer/Counter does not have compare interrupt/event.
The compare channels can be used for waveform generation on the corresponding port pins. To
make the waveform visible on the connected port pin, the following requirements must be
fulfilled:
Inverted waveform output can be achieved by setting the invert I/O on the port pin. Refer to
Ports” on page 139
For the PWM generation, the Period (T) is controlled by the PER register, while CMPx registers
control the duty cycle of the WG output.
from the TOP to the BOTTOM, and then restarts from the TOP. The waveform generator (WG)
output is set on the compare match between the CNT and CMPx registers, and cleared at the
BOTTOM.
CNT
1. The Compare channels to be used must be enabled. This will override the correspond-
2. The direction for the associated port pin must be set to output.
ing port pin output register.
BOTTOM
MAX
New TOP written to
PER that is higher
than current CNT
for more details.
Figure 15-5 on page 193
New TOP written to
PER that is lower
than current CNT
Atmel AVR XMEGA AU
shows how the counter counts
"reload"
"write"
”I/O
192