ATxmega128A3U Atmel Corporation, ATxmega128A3U Datasheet - Page 372
ATxmega128A3U
Manufacturer Part Number
ATxmega128A3U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128A3U
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega128A3U-AU
Manufacturer:
ATMEL
Quantity:
39
Company:
Part Number:
ATxmega128A3U-MH
Manufacturer:
ATMEL
Quantity:
1
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28.16.10 CHnRESH – Channel n Result register High
28.16.10.1
28.16.10.2
28.16.10.3
28.16.11 CHnRESL – Channel n Result register Low
28.16.11.1
28.16.11.2
8331A–AVR–07/11
12-bit mode, left adjusted
12-bit mode, right adjusted
8-bit mode
12-/8-bit mode
12-bit mode, left adjusted
The CHnRESL and CHnRESH register pair represents the 16-bit value CHnRES. For details on
reading 16-bit register refer to
• Bit 7:0 – CHRES[11:4]: ADC Channel Result, high byte
These are the 8 MSB of the 12-bit ADC result.
• Bit 7:4 – Reserved
These bits will in practice be the extension of the sign bit CHRES11 when ADC works in differen-
tial mode and set to zero when ADC works in signed mode.
• Bit 3:0 – CHRES[11:8]: ADC Channel Result, high byte
These are the 4 MSB of the 12-bit ADC result.
• Bit 7:0 – Reserved
These bits will in practice be the extension of the sign bit CHRES7 when ADC works in signed
mode and set to zero when ADC works in single-ended mode.
• Bit 7:0 – CHRES[7:0]: ADC Channel Result, low byte
These are the 8 LSB of the ADC result.
• Bit 7:4 – CHRES[3:0]: ADC Channel Result, low byte
These are the 4 LSB of the 12 bit ADC result.
12-/8-bit, right
12-bit, left
12-bit, left
12-bit, right
8-bit
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
R
R
7
–
–
0
7
0
”Accessing 16-bit Registers” on page
R
R
6
–
–
0
6
0
CHRES[3:0]
R
R
5
–
–
0
5
0
Atmel AVR XMEGA AU
R
R
4
–
–
0
4
0
CHRES[11:4]
CHRES[7:0]
R
R
3
–
0
3
–
0
12.
R
R
2
–
0
2
–
0
CHRES[11:8]
R
R
1
–
0
1
–
0
R
R
0
–
0
0
–
0
372
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