SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 27

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

8.2.4
9. System Controller
6249HS–ATARM–27-Jul-09
Error Corrected Code Controller
The System Controller is a set of peripherals that allow handling of key elements of the system,
such as power, resets, clocks, time, interrupts, watchdog, etc.
The System Controller User Interface also embeds registers that are used to configure the Bus
Matrix and a set of registers for the chip configuration. The chip configuration registers can be
used to configure:
The System Controller peripherals are all mapped within the highest 16 Kbytes of address
space, between addresses 0xFFFF C000 and 0xFFFF FFFF.
However, all the registers of the System Controller are mapped on the top of the address space.
This allows all the registers of the System Controller to be addressed from a single pointer by
using the standard ARM instruction set, as the Load/Store instructions have an indexing mode of
± 4 Kbytes.
Figure 9-1 on page 28
Figure 8-1 on page 21
peripherals.
• Energy-saving capabilities
• Error detection
• SDRAM Power-up Initialization by software
• CAS Latency of 1, 2 and 3 supported
• Auto Precharge Command not used
• Tracking the accesses to a NAND Flash device by triggering on the corresponding chip select
• Single-bit error correction and two-bit random detection
• Automatic Hamming Code Calculation while writing
• Automatic Hamming Code Calculation while reading
– Self-refresh, power down and deep power down modes supported
– Refresh Error Interrupt
– ECC value available in a register
– Error Report, including error flag, correctable error flag and word address being
– Support 8- or 16-bit NAND Flash devices with 512-, 1024-, 2048- or 4096-byte
– EBI0 and EBI1 chip select assignment and voltage range for external memories
– ARM Processor Tightly Coupled Memories
detected erroneous
pages
shows the System Controller block diagram.
shows the mapping of the User Interfaces of the System Controller
AT91SAM9263
27