SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 222
SAM9G45
Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G45.pdf
(10 pages)
5.SAM9G45.pdf
(55 pages)
6.SAM9G45.pdf
(1196 pages)
Specifications of SAM9G45
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G45 PDF datasheet #4
- SAM9G45 PDF datasheet #5
- SAM9G45 PDF datasheet #6
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- Download datasheet (2Mb)
CP15 Test and Debug Registers
B-16
Bit
[31:16]
[15:14]
[13:12]
[11:10]
[9:8]
[7:6]
[5:4]
[3:2]
[1:0]
Name
-
IWB
IWT
INCB
INCNB
DWB
DWT
DNCB
DNCNB
Table B-12 describes the bit fields of the Memory Region Remap Register.
Table B-13 shows the encoding of each of the remap fields.
Definition
Should Be Zero
Remap select bits for instruction-side write-back region
Remap select bits for instruction-side write-through region
Remap select bits for instruction-side noncachable bufferable region
Remap select bits for instruction-side noncachable nonbufferable region
Remap select bits for data-side write-back region
Remap select bits for data-side write-through region
Remap select bits for data-side noncachable bufferable region
Remap select bits for data-side noncachable nonbufferable region
Copyright © 2001-2003 ARM Limited. All rights reserved.
Table B-12 Encoding of the Memory Region Remap Register
Table B-13 Encoding of the remap fields
Remap field
b00 = noncachable nonbufferable
b01 = noncachable bufferable
b10 = write-through
b11 = write-back
ARM DDI0198D
Reset state
b10
b00
b01
b00
b11
b01
b11
b10
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