SAM9R64 Atmel Corporation, SAM9R64 Datasheet - Page 72

• Manufacturer Part Number: SAM9R64
• Manufacturer: Atmel Corporation

Specifications of SAM9R64

• Flash (kbytes): 0 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 49
• Ext Interrupts: 49
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 1
• Uart: 5
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 3
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Memory Management Unit
3.2.2
3.2.3
3-8
31
31
31
First-level fetch
First-level descriptor
Translation base
Translation base
Bits [31:14] of the TTBR are concatenated with bits [31:20] of the MVA to produce a
30-bit address as shown in Figure 3-3.
This address selects a 4-byte translation table entry. This is a first-level descriptor for
either a section or a page table.
The first-level descriptor returned is a section descriptor, a coarse page table descriptor,
or a fine page table descriptor, or is invalid. Figure 3-4 on page 3-9 shows the format of
a first-level descriptor.
Translation table base
First-level descriptor
Copyright © 2001-2003 ARM Limited. All rights reserved.
14 13
14 13
31
Figure 3-3 Accessing translation table first-level descriptors
Table index
Table index
Modified virtual address
20 19
2 1 0
0 0
0
0
ARM DDI0198D
0