SAM9X25 Atmel Corporation, SAM9X25 Datasheet - Page 223
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SAM9X25
Manufacturer Part Number
SAM9X25
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9X25.pdf
(45 pages)
3.SAM9X25.pdf
(1145 pages)
4.SAM9X25.pdf
(45 pages)
5.SAM9X25.pdf
(1325 pages)
Specifications of SAM9X25
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
2
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9X25 PDF datasheet #2
- SAM9X25 PDF datasheet #3
- SAM9X25 PDF datasheet #4
- SAM9X25 PDF datasheet #5
- Current page: 223 of 248
- Download datasheet (2Mb)
ARM DDI0198D
MMU
Figure B-10 shows the flow and precedence of CP15 c15 control bits in resolving the
cachable and bufferable attributes of a memory reference.
M, C, and I bits
Copyright © 2001-2003 ARM Limited. All rights reserved.
MDDEB bit:
MMU disabled,
DCache enabled
C and B bits
NCNB
NCB
CNB (write-through)
CB (write-back)
Memory Region Remap Register
Debug Override Register
Page table descriptor
Control Register
remapping
Memory
region
Figure B-10 Memory region attribute resolution
NCNB
NCB
CNB (write-through)
CB (write-back)
CP15 Test and Debug Registers
Force NCB store
to be NCNB
FNCB bit:
NCB store
NCNB
Force
to be
B-17
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