SAM3N0A Atmel Corporation, SAM3N0A Datasheet - Page 155
SAM3N0A
Manufacturer Part Number
SAM3N0A
Description
Manufacturer
Atmel Corporation
- Current page: 155 of 752
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10.20.4
• SETPEND
Interrupt set-pending bits.
Write:
0 = no effect.
1 = changes interrupt state to pending.
Read:
0 = interrupt is not pending.
1 = interrupt is pending.
Writing 1 to the ISPR bit corresponding to:
11011A–ATARM–04-Oct-10
• an interrupt that is pending has no effect
• a disabled interrupt sets the state of that interrupt to pending
31
23
15
7
Interrupt Set-pending Registers
30
22
14
6
The ISPR0 register forces interrupts into the pending state, and shows which interrupts are
pending. See:
The bit assignments are:
• the register summary in
•
Table 10-28 on page 152
29
21
13
5
28
20
12
4
Table 10-27 on page 151
for which interrupts are controlled by each register.
SETPEND
SETPEND
SETPEND
SETPEND
27
19
11
3
for the register attributes
26
18
10
2
25
17
9
1
SAM3N
24
16
8
0
155
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