SAM3N0A Atmel Corporation, SAM3N0A Datasheet - Page 473
SAM3N0A
Manufacturer Part Number
SAM3N0A
Description
Manufacturer
Atmel Corporation
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28.8.7
28.8.7.1
28.8.7.2
28.8.8
28.8.9
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
Using the Peripheral DMA Controller (PDC)
Using the DMA Controller (DMAC)
SMBUS Quick Command (Master Mode Only)
Data Transmit with the PDC
Data Receive with the PDC
The use of the PDC significantly reduces the CPU load.
To assure correct implementation, respect the following programming sequences:
The use of the DMAC significantlly reduces the CPU load.
To assure correct implementation, respect the following programming sequence.
The TWI interface can perform a Quick Command:
Figure 28-14. SMBUS Quick Command
1. Initialize the transmit PDC (memory pointers, size, etc.).
2. Configure the master mode (DADR, CKDIV, etc.).
3. Start the transfer by setting the PDC TXTEN bit.
4. Wait for the PDC end TX flag.
5. Disable the PDC by setting the PDC TXDIS bit.
1. Initialize the receive PDC (memory pointers, size - 1, etc.).
2. Configure the master mode (DADR, CKDIV, etc.).
3. Start the transfer by setting the PDC RXTEN bit.
4. Wait for the PDC end RX flag.
5. Disable the PDC by setting the PDC RXDIS bit.
1. Initialize the DMAC (channels, memory pointers , size, etc.);
1. Configure the master mode (DADR, CKDIV, etc.).
1. Enable the DMAC.
1. Wait for the DMAC flag.
1. Disable the DMAC.
1. Configure the master mode (DADR, CKDIV, etc.).
2. Write the MREAD bit in the TWI_MMR register at the value of the one-bit command to
3. Start the transfer by setting the QUICK bit in the TWI_CR.
be sent.
TXCOMP
Write QUICK command in TWI_CR
TXRDY
TWD
S
DADR
R/W
A
P
SAM3N
SAM3N
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