SAM3N0A Atmel Corporation, SAM3N0A Datasheet - Page 448

• Manufacturer Part Number: SAM3N0A
• Manufacturer: Atmel Corporation

27.8.1
Name:
Address:
Access:
• SPIEN: SPI Enable
0 = No effect.
1 = Enables the SPI to transfer and receive data.
• SPIDIS: SPI Disable
0 = No effect.
1 = Disables the SPI.
As soon as SPIDIS is set, SPI finishes its transfer.
All pins are set in input mode and no data is received or transmitted.
If a transfer is in progress, the transfer is finished before the SPI is disabled.
If both SPIEN and SPIDIS are equal to one when the control register is written, the SPI is disabled.
• SWRST: SPI Software Reset
0 = No effect.
1 = Reset the SPI. A software-triggered hardware reset of the SPI interface is performed.
The SPI is in slave mode after software reset.
PDC channels are not affected by software reset.
• LASTXFER: Last Transfer
0 = No effect.
1 = The current NPCS will be deasserted after the character written in TD has been transferred. When CSAAT is set, this
allows to close the communication with the current serial peripheral by raising the corresponding NPCS line as soon as TD
transfer has completed.
Refer to
448
448
SWRST
31
23
15
–
–
–
7
Section 27.7.3.5 ”Peripheral Selection”
SAM3N
SAM3N
SPI Control Register
30
22
14
SPI_CR
0x40008000
Write-only
–
–
–
6
–
29
21
13
–
–
–
5
–
for more details.
28
20
12
–
–
–
4
–
27
19
11
–
–
–
–
3
26
18
10
–
–
–
2
–
SPIDIS
25
17
–
–
–
9
1
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
LASTXFER
SPIEN
24
16
–
8
–
0