SAM3N0A Atmel Corporation, SAM3N0A Datasheet - Page 654
SAM3N0A
Manufacturer Part Number
SAM3N0A
Description
Manufacturer
Atmel Corporation
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Figure 33-3. EOCx and DRDY Flag Behavior
654
654
(ADC_CHSR)
(ADC_SR)
(ADC_SR)
EOCx
DRDY
CHx
SAM3N
SAM3N
Write the ADC_CR
with START = 1
If the ADC_CDR is not read before further incoming data is converted, the corresponding Over-
run Error (OVREx) flag is set in the Overrun Status Register (ADC_OVER).
Likewise, new data converted when DRDY is high sets the GOVRE bit (General Overrun Error)
in ADC_SR.
The OVREx flag is automatically cleared when ADC_OVER is read, and GOVRE flag is auto-
matically cleared when ADC_SR is read.
Read the ADC_CDRx
Write the ADC_CR
with START = 1
Read the ADC_LCDR
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
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