LPC2939 NXP Semiconductors, LPC2939 Datasheet - Page 52

The LPC2939 combine an ARM968E-S CPU core with two integrated TCM blocksoperating at frequencies of up to 125 MHz, Full-speed USB 2

LPC2939

Manufacturer Part Number
LPC2939
Description
The LPC2939 combine an ARM968E-S CPU core with two integrated TCM blocksoperating at frequencies of up to 125 MHz, Full-speed USB 2
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
LPC2939_3
Product data sheet
6.16.2.1 Functional description
6.16.2 Clock Generation Unit (CGU0)
The key features are:
Remark: Any clock-frequency adjustment has a direct impact on the timing of all on-board
peripherals.
The clock generation unit provides 10 internal clock sources as described in
Table 27.
[1]
[2]
For generation of these base clocks, the CGU consists of primary and secondary clock
generators and one output generator for each base clock.
Number
0
1
2
3
4
5
6
7
8
9
10
11
Generation of 11 base clocks selectable from several embedded clock sources
Crystal oscillator with power-down
Control PLL with power-down
Very low-power ring oscillator, always on to provide a safe clock
Seven fractional clock dividers with L/D division
Individual source selector for each base clock, with glitch-free switching
Autonomous clock-activity detection on every clock source
Protection against switching to invalid or inactive clock sources
Embedded frequency counter
Register write-protection mechanism to prevent unintentional alteration of clocks
Maximum frequency that guarantees stable operation of the LPC2939.
Fixed to low-power oscillator.
CGU0 base clocks
Name
BASE_SAFE_CLK
BASE_SYS_CLK
BASE_PCR_CLK
BASE_IVNSS_CLK
BASE_MSCSS_CLK
BASE_ICLK0_CLK
BASE_UART_CLK
BASE_SPI_CLK
BASE_TMR_CLK
BASE_ADC_CLK
reserved
BASE_ICLK1_CLK
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 7 April 2010
Frequency
(MHz)
0.4
125
0.4
125
125
125
125
50
125
4.5
-
125
ARM9 microcontroller with CAN, LIN, and USB
[2]
[1]
Description
base safe clock (always on)
base system clock
base PCR subsystem clock
base IVNSS subsystem clock
base MSCSS subsystem clock
base internal clock 0, for CGU1
base UART clock
base SPI clock
base timers clock
base ADCs clock
-
base internal clock 1, for CGU1
LPC2939
© NXP B.V. 2010. All rights reserved.
Table
27.
52 of 99

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