P89LPC9321 NXP Semiconductors, P89LPC9321 Datasheet - Page 43

• Manufacturer Part Number: P89LPC9321
• Description: The P89LPC9321 is a single-chip microcontroller, available in low cost packages, basedon a high performance processor architecture that executes instructions in two to fourclocks, six times the rate of standard 80C51 devices
• Manufacturer: NXP Semiconductors

NXP Semiconductors
P89LPC9321
Product data sheet
Fig 19. Comparator input and output connections
(P0.4) CIN1A
(P0.3) CIN1B
(P0.2) CIN2A
(P0.1) CIN2B
7.26.1 Internal reference voltage
7.26.2 Comparator interrupt
7.26.3 Comparators and power reduction modes
PGA1
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to as
V
Each comparator has an interrupt flag contained in its configuration register. This flag is
set whenever the comparator output changes state. The flag may be polled by software or
may be used to generate an interrupt. The two comparators use one common interrupt
vector. If both comparators enable interrupts, after entering the interrupt service routine,
the user needs to read the flags to determine which comparator caused the interrupt.
Either or both comparators may remain enabled when Power-down or Idle mode is
activated, but both comparators are disabled automatically in Total Power-down mode.
If a comparator interrupt is enabled (except in Total Power-down mode), a change of the
comparator output state will generate an interrupt and wake-up the processor. If the
comparator output to a pin is enabled, the pin should be configured in the push-pull mode
in order to obtain fast switching times while in Power-down mode. The reason is that with
the oscillator stopped, the temporary strong pull-up that normally occurs during switching
on a quasi-bidirectional port pin does not take place.
Comparators consume power in Power-down and Idle modes, as well as in the normal
operating mode. This fact should be taken into account when system power consumption
is an issue. To minimize power consumption, the user can disable the comparators via
PCONA.5, or put the device in Total Power-down mode.
ref(bg)
(P0.5) CMPREF
, is 1.23 V ± 10 %.
V
ref(bg)
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 16 November 2010
CP1
CN1
CP2
CN2
8-bit microcontroller with accelerated two-clock 80C51 core
comparator 1
comparator 2
CO1
CO2
change detect
change detect
OE1
OE2
CMF1
CMF2
CMP1 (P0.6)
CMP2 (P0.0)
P89LPC9321
002aad561
© NXP B.V. 2010. All rights reserved.
EC
interrupt
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