P89LPC9321 NXP Semiconductors, P89LPC9321 Datasheet - Page 45

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P89LPC9321

Manufacturer Part Number
P89LPC9321
Description
The P89LPC9321 is a single-chip microcontroller, available in low cost packages, basedon a high performance processor architecture that executes instructions in two to fourclocks, six times the rate of standard 80C51 devices
Manufacturer
NXP Semiconductors
Datasheet

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P89LPC9321
Product data sheet
Fig 20. Watchdog timer in Watchdog mode (WDTE = 1)
watchdog
oscillator
(1) Watchdog reset can also be caused by an invalid feed sequence, or by writing to WDCON not immediately followed by a feed
PCLK
sequence.
7.29.1 Software reset
7.29.2 Dual data pointers
7.29.3 Data EEPROM
0
1
7.29 Additional features
MOV WFEED1, #0A5H
MOV WFEED2, #05AH
oscillator
crystal
The SRST bit in AUXR1 gives software the opportunity to reset the processor completely,
as if an external reset or watchdog reset had occurred. Care should be taken when writing
to AUXR1 to avoid accidental software resets.
The dual Data Pointers (DPTR) provides two different Data Pointers to specify the
address used with certain instructions. The DPS bit in the AUXR1 register selects one of
the two Data Pointers. Bit 2 of AUXR1 is permanently wired as a logic 0 so that the DPS
bit may be toggled (thereby switching Data Pointers) simply by incrementing the AUXR1
register, without the possibility of inadvertently altering other bits in the register.
The P89LPC9321 has 512 bytes of on-chip Data EEPROM. The Data EEPROM is SFR
based, byte readable, byte writable, and erasable (via row fill and sector fill). The user can
read, write and fill the memory via SFRs and one interrupt. This Data EEPROM provides
100,000 minimum erase/program cycles for each byte.
XTALWD
0
1
Byte mode: In this mode, data can be read and written one byte at a time.
Row fill: In this mode, the addressed row (64 bytes) is filled with a single value. The
entire row can be erased by writing 00H.
Sector fill: In this mode, all 512 bytes are filled with a single value. The entire sector
can be erased by writing 00H.
WDCON (A7H)
÷32
All information provided in this document is subject to legal disclaimers.
PRE2
Rev. 2 — 16 November 2010
PRESCALER
8-bit microcontroller with accelerated two-clock 80C51 core
PRE1
PRE0
SHADOW REGISTER
-
-
8-BIT DOWN
WDL (C1H)
COUNTER
WDRUN
P89LPC9321
WDTOF
© NXP B.V. 2010. All rights reserved.
WDCLK
002aae015
reset
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(1)

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