P89LPC9321 NXP Semiconductors, P89LPC9321 Datasheet - Page 9

• Manufacturer Part Number: P89LPC9321
• Description: The P89LPC9321 is a single-chip microcontroller, available in low cost packages, basedon a high performance processor architecture that executes instructions in two to fourclocks, six times the rate of standard 80C51 devices
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 3.
P89LPC9321
Product data sheet
Symbol
P0.6/CMP1/KBI6
P0.7/T1/KBI7
P1.0 to P1.7
P1.0/TXD
P1.1/RXD
P1.2/T0/SCL
P1.3/INT0/SDA
P1.4/INT1
P1.5/RST
P1.6/OCB
P1.7/OCC
P2.0 to P2.7
Pin description
Pin
20
19
18
17
12
11
10
6
5
4
…continued
Type Description
I/O
O
I
I/O
I/O
I
I/O, I
[1]
I/O
O
I/O
I
I/O
I/O
I/O
I/O
I
I/O
I/O
I
I
I
I/O
O
I/O
O
I/O
P0.6 — Port 0 bit 6. High current source.
CMP1 — Comparator 1 output.
KBI6 — Keyboard input 6.
P0.7 — Port 0 bit 7. High current source.
T1 — Timer/counter 1 external count input or overflow output.
KBI7 — Keyboard input 7.
Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type, except for
three pins as noted below. During reset Port 1 latches are configured in the input
only mode with the internal pull-up disabled. The operation of the configurable
Port 1 pins as inputs and outputs depends upon the port configuration selected.
Each of the configurable port pins are programmed independently. Refer to
Section 7.16.1 “Port configurations”
details. P1.2 to P1.3 are open drain when used as outputs. P1.5 is input only.
All pins have Schmitt trigger inputs.
Port 1 also provides various special functions as described below:
P1.0 — Port 1 bit 0.
TXD — Transmitter output for serial port.
P1.1 — Port 1 bit 1.
RXD — Receiver input for serial port.
P1.2 — Port 1 bit 2 (open-drain when used as output).
T0 — Timer/counter 0 external count input or overflow output (open-drain when
used as output).
SCL — I
P1.3 — Port 1 bit 3 (open-drain when used as output).
INT0 — External interrupt 0 input.
SDA — I
P1.4 — Port 1 bit 4. High current source.
INT1 — External interrupt 1 input.
P1.5 — Port 1 bit 5 (input only).
RST — External Reset input during power-on or if selected via UCFG1. When
functioning as a reset input, a LOW on this pin resets the microcontroller, causing
I/O ports and peripherals to take on their default states, and the processor begins
execution at address 0. Also used during a power-on sequence to force ISP mode.
P1.6 — Port 1 bit 6. High current source.
OCB — Output Compare B
P1.7 — Port 1 bit 7. High current source.
OCC — Output Compare C.
Port 2: Port 2 is an 8-bit I/O port with a user-configurable output type. During reset
Port 2 latches are configured in the input only mode with the internal pull-up
disabled. The operation of Port 2 pins as inputs and outputs depends upon the port
configuration selected. Each port pin is configured independently. Refer to
7.16.1 “Port configurations”
All pins have Schmitt trigger inputs.
Port 2 also provides various special functions as described below:
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 16 November 2010
2
2
C-bus serial clock input/output.
C-bus serial data input/output.
8-bit microcontroller with accelerated two-clock 80C51 core
and
Table 10 “Static characteristics”
and
Table 10 “Static characteristics”
P89LPC9321
© NXP B.V. 2010. All rights reserved.
for details.
for
Section
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