STM32W108C8 STMicroelectronics, STM32W108C8 Datasheet - Page 109

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STM32W108C8

Manufacturer Part Number
STM32W108C8
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with 64-Kybte Flash memory
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32W108C8

Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch and breakpoint; data watchpoint and trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators

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STM32W108C8
9.13.16
Table 82.
31
15
Reserved
30
14
Bits [12:0] SC_RXERRB: The offset from the start of DMA receive buffer B of the first byte received with a
DMA first receive error register B (SCx_RXERRB)
Address offset: 0xC838 (SC1_RXERRB) and 0xC038 (SC2_RXERRB)
Reset value:
DMA first receive error register B (SCx_RXERRB)
29
13
parity, frame, or overflow error. Note that an overflow error occurs at the input to the receive
FIFO, so this offset is 4 bytes before the overflow position. If there is no error, it reads zero. This
register will not be updated by subsequent errors until the buffer unloads and is reloaded, or the
receive DMA is reset.
28
12
27
11
0x0000 0000
26
10
25
9
Doc ID 018587 Rev 2
24
8
Reserved
23
7
SC_RXERRB
22
6
r
21
5
20
4
19
3
Serial interfaces
18
2
17
1
108/215
16
0

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