STM32W108C8 STMicroelectronics, STM32W108C8 Datasheet - Page 176

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STM32W108C8

Manufacturer Part Number
STM32W108C8
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with 64-Kybte Flash memory
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32W108C8

Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch and breakpoint; data watchpoint and trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators

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Interrupts
175/215
Table 122. NVIC exception table
Serial Controller 1
Serial Controller 2
Debug Monitor
MAC Transmit
Memory Fault
MAC Receive
Management
Sleep Timer
Usage Fault
MAC Timer
Exception
Hard Fault
Baseband
Bus Fault
PendSV
Security
SysTick
Timer 1
Timer 2
SVCall
Reset
IRQA
IRQB
IRQC
ADC
NMI
-
-
-
Position
7-10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
0
1
2
3
4
5
6
Stack top is loaded from first entry of vector table on reset.
Invoked on power up and warm reset. On first instruction, drops to
lowest priority (Thread mode). Asynchronous.
Cannot be stopped or preempted by any exception but reset.
Asynchronous.
All classes of fault, when the fault cannot activate because of priority
or the Configurable Fault handler has been disabled. Synchronous.
MPU mismatch, including access violation and no match.
Synchronous.
Pre-fetch, memory access, and other address/memory-related faults.
Synchronous when precise and asynchronous when imprecise.
Usage fault, such as 'undefined instruction executed' or 'illegal state
transition attempt'. Synchronous.
Reserved.
System service call with SVC instruction. Synchronous.
Debug monitor, when not halting. Synchronous, but only active when
enabled. It does not activate if lower priority than the current
activation.
Reserved.
Pendable request for system service. Asynchronous and only pended
by software.
System tick timer has fired. Asynchronous.
Timer 1 peripheral interrupt.
Timer 2 peripheral interrupt.
Management peripheral interrupt.
Baseband peripheral interrupt.
Sleep Timer peripheral interrupt.
Serial Controller 1 peripheral interrupt.
Serial Controller 2 peripheral interrupt.
Security peripheral interrupt.
MAC Timer peripheral interrupt.
MAC Transmit peripheral interrupt.
MAC Receive peripheral interrupt.
ADC peripheral interrupt.
IRQA peripheral interrupt.
IRQB peripheral interrupt.
IRQC peripheral interrupt.
Doc ID 018587 Rev 2
Description
STM32W108C8

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